1. Field of the Invention
The present invention relates generally to Integrated Circuits (IC), and more specifically to techniques for minimizing the number of external terminals required when compensation is to be provided for signal drop in a bond wire of a package in which an IC is provided.
2. Related Art
An integrated circuit (IC, sometimes also referred to variously as microcircuit, microchip, silicon chip, chip, etc.) generally is a miniaturized circuit, often containing semiconductor devices (as well as passive components such as resistors etc) that have been manufactured on a substrate, usually of a semiconductor or ceramic material.
An IC may be constructed/fabricated as a monolithic IC or hybrid IC. In a monolithic IC, the entire circuit is built into a single piece of semiconductor (chip), whereas a hybrid IC may contain multiple monolithic integrated circuits, and/or discrete semiconductor device circuits (typically fabricated on a ceramic substrate) interconnected in a desired manner.
ICs may be packaged in a housing (IC package, chip package), which is generally suitable for plugging into or soldering onto a printed circuit board. Dual-in-line package (DIP), Small-outline-IC (SOIC), plastic leaded chip carrier (PLCC), flat-pack etc., are some examples of the various packages, as is well-known in the relevant arts. Each package contains external terminals (such as a pin or ball), which may operate as input, output and/or power pins.
An IC may contain one or more pads on which corresponding signals of interest such as input signals, output signals, power supply voltages, etc., are provided/received to/from external components. A pad generally refers to a contact on the substrate to provide/receive such signals, and is often implemented as a metal.
Generally, each pad of the IC is connected by a bond wire (often made of gold) to a corresponding external terminal on the IC package. A bond wire may be associated with an impedance and often causes a reduction in signal strength (signal drop). For example, the voltage drop (IR drop) caused by a bond wire, may cause an output voltage generated in the IC (e.g., at a pad of the IC) to be below a desired level (strength) at the external terminals.
Therefore, it is desirable to compensate for such signal drops due to bond wires. It is further generally desirable that the compensation be provided while reducing (or using as few pins as possible) the pin-count (i.e., number of external terminals) requirements.
Several aspects of the present invention enable minimizing the number of external terminals required when compensation is to be provided for signal drop in bond wire of a package in which an integrated circuit is provided.
In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number.